Difference between revisions of "Reverse engineering ZIOVA CS615"
From Randomdata wiki
(→Pinout UART) |
(→Pinout UART) |
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== Pinout UART == | == Pinout UART == | ||
| − | X X TX X | + | <pre> |
| − | + | X X TX X GND | |
| + | . X RX X X | ||
| + | </pre> | ||
| + | |||
| + | X:pin<br> | ||
| + | .:nopin<br> | ||
| + | TX: Transmit (box)<br> | ||
| + | RX: Read (box)<br> | ||
| + | GND: Ground<br> | ||
= Hardware = | = Hardware = | ||
Revision as of 21:59, 8 May 2012
Contents |
Inside
Pinout UART
X X TX X GND . X RX X X
X:pin
.:nopin
TX: Transmit (box)
RX: Read (box)
GND: Ground
Hardware
CS615[bin]$ cat /proc/cpuinfo system type : Sigma Designs TangoX processor : 0 cpu model : MIPS 4KEc V6.9 Initial BogoMIPS : 291.84 wait instruction : yes microsecond timers : yes tlb_entries : 32 extra interrupt vector : yes hardware watchpoint : yes ASEs implemented : mips16 VCED exceptions : not available VCEI exceptions : not available System bus frequency : 198000000 Hz CPU frequency : 297000000 Hz DSP frequency : 297000000 Hz